Center for advanced Computer Studies (CACS),
University of Southwestern Louisiana (USL),
[Projects], [Publication], [Director], [Working Group], [In memories]
Note: All documents are zipped Postscript files.
Paul Shipley, Michael Weeks, Magdy Bayoumi, "A Controller Chip for a Scaleable ATM Switch Node", Proceedings of
the 39th Midwest Symposium on Circuits and Systems, Ames, Iowa, August 18-21, 1996, pages 73-76.
Paul Shipley, Michael Weeks, Magdy Bayoumi, "A Scaleable Very Large ATM Switch Architecture For Bursty Traffic" ,
Proceedings of the Fifth International Conference on Computer Communications and Networks (ICCCN '96), Rockville,
Maryland, October 16-19, 1996, pages 188-191.
M. Weeks, M. B. Maaz, H. Krishnamurthy, P. Shipley, M. Bayoumi,"A Prototype Chipset for a Large Scaleable ATM
Switching Node" , Seventh Great Lakes Symposium on VLSI, Urbana-Champaign Illinois, March 13-15, 1997, pages
131-136.
M. A. Bayoumi, "Design Methodologies of VLSI DSP Systems", edited book, Kluwer Academic Publishers, 1994.
M. A. Bayoumi, "Parallel Algorithms and Architectures for DSP Applications", edited book, Kluwer Academic Publishers, 1991.
Q. M. Malluhi and M. A. Bayoumi, "The Hierarchical Hypercube: A New Interconnection Topology for Massively Parallel Systems," IEEE Trans. on Parallel and Distributed Processing , Vol. 5, No. 5, pp. 17-30, Jan. 1994.
Q. M. Malluhi, M. A. Bayoumi, and T. R. Rao, "An Application-Specific Array Architecture for Feed-Forward with Back Projection ANNs", 1993 International Conference on Application-Specific Array Processors.
A. Tyagi and M. A. Bayoumi, "On Analyzing the Nature of Defect Patterns on IC Wafers", IEEE Transactions on Reliability , 1994
K. M. Elleithy and M. A. Bayoumi, "Fast and Flexible Architectures for RNS Arithmetic Decoding", IEEE Trans on Circuits and Systems, 1992.
T. Madraswala, M. A. Bayoumi, et al, "A Reconfigurable ANN Architecture", Proceedings of the IEEE International Symposium on Circuits and Systems , May 1992.
A. Tyagi and M.A. Bayoumi, ``Image Segmentation on 2D Array by a Directed Split and Merge Procedure'', IEEE Trans. on Acoustics, Speech, and Signal Processing , 1992.
N. Ling and M.A. Bayoumi, ``Systematic Algorithm Mapping for Multi-Dimensional Systolic Arrays'', Journal of Parallel and Distributed Computing , Vol. 7, pp. 368-382, 1989.
N. Ling and M.A. Bayoumi, ``Systolic Temporal Arithmetic: A New Formalism for Specification and Verification of Systolic Arrays'', IEEE Trans. on Computer Aided Design , Vol. 9, No. 8, pp. 804-820, Aug. 1990.
M.A. Bayoumi and N. Ling, ``Testing of a NORA CMOS Serial-Parallel Multiplier'', IEEE Journal of Solid-State Circuits , Vol. 26, No. 2, pp. 494-503, 1989.
M.A. Bayoumi, G.A. Jullien, and W.C. Miller, ``A Look-up Table VLSI Design Methodology for RNS Structures Used in DSP Applications'', IEEE Trans. On Circuits and Systems , Vol. CAS-34, No. 6, pp. 604-616, June 1987.
Edmison Prof. Magdy Bayoumi, [email protected]
ATM Group
Kambiz Zamani
CAD Tools Group
Ashouk Kumar
Hanan Mahmoud
VLSI Circuit Design Group
Ahmed Sayed
DSP and Wavelet Group
We respect all of the following names for their effort and researches in our lab.
Amr El-Chouemi
Bassem El halaby
Emad Abu-Shama
Daniel Seidel
Jimmy Limqenco
Paul Shipely
Sherif Sayed
Rafic Aoubi
Raghava Cherabuddi